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Jobs
FPGA Verification Engineer
| Posted On: Oct 15, 2025
Santa Clara, CA 95054
3 Months, Contract
On-site
Job Summary
- Job Title:
- FPGA Verification Engineer
- Posted Date:
- Oct 15, 2025
- Duration:
- 3 Months, Contract
- Shift(s):
-
08:00 - 16:00
- Salary ($):
- 52.00 - 54.00 per Hourly (compensation based on experience and qualifications)
- We care about you! Explore Rangam’s benefits information
Talk to our Recruiter
- Name:
- Shyam Khandelwal
- Email:
- shyam@rangam.com
- Phone:
- 973-598-3755
Description
Must Have Skills
- FPGA
- UVM
- System Verlilog
The Opportunity:
- We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art technologies. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.
- You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.
Key Responsibilities:
- Create and maintain test benches using industry-standard verification methodologies (e.g., UVM, System Verilog, RTL).
- Write and debug test cases to verify functionality, performance, and corner cases.
- Identify and debug issues, working closely with design engineers to resolve them.
- Participate in design reviews and contribute to the overall verification strategy.
- Stay up-to-date with the latest verification methodologies and tools.
Required Skills:
- Strong understanding of FPGA, ASIC, RTL design principles and architectures.
- Proficiency in System Verilog and UVM verification methodology.