Jobs

Description

What days will the worker be expected to work?

• ["Monday","Tuesday","Wednesday","Thursday","Friday"]

What hours will the contingent worker be expected to work? 8am-4p PST

Description:

• This role focuses on designing, developing, and supporting FPGA-based solutions for advanced robotic and medical systems.
• The engineer will own RTL design from architecture through validation, working hands-on across the full FPGA development lifecycle, including simulation, timing closure, hardware bring-up, and system-level debugging.
• The position requires close collaboration with hardware, firmware, software, and systems teams in a highly cross-functional, regulated R&D environment to deliver reliable, safety-critical technology.

Key responsibilities include, but are not limited to:

• Designing, developing, optimizing, and maintaining FPGA RTL using Verilog/SystemVerilog and/or VHDL
• Supporting the full FPGA development lifecycle, including synthesis, place-and-route, timing closure, and bitstream generation
• Performing functional simulation, verification, and system-level debugging

Required Skills and Experience:

• 4+ years of hands-on FPGA design and development experience
• Strong understanding of digital logic, timing analysis, and debugging
• Proficiency in Verilog/SystemVerilog
• Experience with FPGA toolchains such as Xilinx Vivado, Lattice Diamond, or equivalent
• Bachelor’s degree in Mechanical Engineering, Electrical Engineering, or a related scientific field
• Robotics design exposure
• Strong collaboration and communication skill.